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 MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low-Voltage Quiet CMOS Octal Transceiver/Registered Transceiver
(3-State, Non-Inverting)
The MC74LVQ646 is a high performance, non-inverting octal transceiver/registered transceiver operating from a 2.7 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. The MC74LVQ646 is suitable for memory address driving and all TTL level bus oriented transceiver applications. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes from a LOW-to-HIGH logic level. Output Enable (OE) and DIR pins are provided to control the transceiver outputs. In the transceiver mode, data present at the high impedance port may be stored in either the A or the B register or in both. The select controls (SBA, SAB) can multiplex stored and real-time (transparent mode) data. The direction control (DIR) determines which bus will receive data when the enable OE is active LOW. In the isolation mode (OE HIGH), A data may be stored in the B register or B data may be stored in the A register. Only one of the two buses, A or B, may be driven at one time.
MC74LVQ646
LVQ
LOW-VOLTAGE CMOS OCTAL TRANSCEIVER/ REGISTERED TRANSCEIVER
DW SUFFIX PLASTIC SOIC CASE 751E-04
1
24
* Designed for 2.7 to 3.6V VCC Operation - Ideal for Low Power/Low
Noise Applications
24 1
* Guaranteed Simultaneous Switching Noise Level and Dynamic
Threshold Performance * Guaranteed Skew Specifications
SD SUFFIX PLASTIC SSOP CASE 940D-03
* Guaranteed Incident Wave Switching into 75 * Low Static Supply Current (10A) Substantially Reduces System Power
Requirements * Latchup Performance Exceeds 500mA
24 1
DT SUFFIX PLASTIC TSSOP CASE 948H-01
* ESD Performance: Human Body Model >2000V
PIN NAMES
Pins VCC CBA SBA 24 23 22 OE 21 B0 20 B1 19 B2 18 B3 17 B4 16 B5 15 B6 14 B7 13 A0-A7 B0-B7 CAB, CBA SAB, SBA DIR, OE Function Side A Inputs/Outputs Side B Inputs/Outputs Clock Pulse Inputs Select Control Inputs Output Enable Inputs
Pinout: 24-Lead Package (Top View)
1
2
3
4 A0
5 A1
6 A2
7 A3
8 A4
9 A5
10 A6
11 A7
12 GND
CAB SAB DIR
12/95
(c) Motorola, Inc. 1995
1
REV 0
MC74LVQ646
CBA DIR OE 1 3 21
LOGIC DIAGRAM
SBA SAB CAB
22 2 23
C A0 Q D
C Q D B0
1 of 8 Channels
To 7 Other Channels
FUNCTION TABLE
Inputs OE H DIR X X X X X NC L H X X NC X X L H CAB CBA SAB SBA Storage Registers QA QB An Input X L H X X Input X* L H X* L H L L X* X X X* X X L H L H NC NC NC NC NC NC NC NC NC NC L H L H X X X X NC NC NC L H L H NC NC NC NC NC NC NC L H X L H L H Output L H QB L H QB QB Data Ports Bn Input X X X L H Output L H QA L H QA QA Input L H X L H L H Real Time B Data to A Bus Stored B Data to A Bus Real Time B Data to A Bus; Store B Data Stored B Data to A Bus; Store B Data Real Time A Data to B Bus Stored A Data to B Bus Real Time A Data to B Bus; Store A Data Stored A Data to B Bus; Store A Data Isolation, Hold Storage Store A and/or B Data Operating Mode Operating Mode
L
H
H = High Voltage Level; L = Low Voltage Level; X = Don't Care; = Low-to-High Clock Transition; = NOT Low-to-High Clock Transition; NC = No Change; * = The clocks are not internally gated with either the Output Enables or the Source Inputs. Therefore, data at the A or B ports may be clocked into the storage registers, at any time. For ICC reasons, Do Not Float Inputs.
MOTOROLA
2
LVQ DATA BR1478
MC74LVQ646
BUS APPLICATIONS
Real Time Transfer - Bus B to Bus A
Real Time Transfer - Bus A to Bus B
BUS B
OE L
DIR L
CAB X
CBA X
SAB X
SBA L
OE L
DIR H
CAB X
CBA X
SAB L
Store Data from Bus A, Bus B or Busses A and B
Transfer Storage Data to Bus A or Bus B
BUS B
OE X X H
DIR X X X
CAB X
CBA X
SAB X X X
SBA X X X
OE L L
DIR L H
CAB X H or L
CBA H or L X
SAB X H
LCX DATA BR1478
3
BUS B SBA H X MOTOROLA
BUS A
BUS A
BUS B SBA X
BUS A
BUS A
MC74LVQ646
ABSOLUTE MAXIMUM RATINGS*
Symbol VCC VI VO IIK Parameter DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current Value -0.5 to +7.0 -0.5 VI VCC + 0.5V -0.5 VO VCC + 0.5 -20 +20 IOK DC Output Diode Current -20 +20 IO ICC IGND TSTG DC Output Source/Sink Current DC Supply Current DC Ground Current Storage Temperature Range 50 400 400 -65 to +150 Output in HIGH or LOW State VI = -0.5V VI = VCC + 0.5V VO = -0.5V VI = VCC + 0.5V Condition Unit V V V mA mA mA mA mA mA mA C
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO TA V/t Supply Voltage Input Voltage Output Voltage Operating Free-Air Temperature Input Transition Rise or Fall Rate, VIN from 0.8V to 2.0V, VCC = 3.0V Parameter Min 2.0 0 0 -40 0 Typ 3.3 Max 3.6 VCC VCC +85 125 Unit V V V C mV/ns
DC ELECTRICAL CHARACTERISTICS
TA = -40C to +85C Symbol VIH VIL VOH Characteristic HIGH Level Input Voltage (Note 1) LOW Level Input Voltage (Note 1) HIGH Level Output Voltage Condition 2.7V VCC 3.6V, VO = 0.1V or VCC - 0.1V 2.7V VCC 3.6V, VO = 0.1V or VCC - 0.1V 2.7V VCC 3.6V; IOH = -50A VCC = 2.7V; IOH = -12mA VCC = 3.0V; IOH = -12mA VOL LOW Level Output Voltage 2.7V VCC 3.6V; IOL = 50A 2.7V VCC 3.6V; IOL= 12mA II IOZT IOLD IOHD ICC Quiescent Supply Current Input Leakage Current Maximum I/O Leakage Current Minimum Dynamic Output Current (Note 2) 2.7V VCC 3.6V; VI= VCC, GND VI(OE) = VIL, VIH; VI, VO= VCC, GND VCC = 3.6V; VOLD = 0.8V Max VCC = 3.6V; VOHD = 2.0V Min 2.7V VCC 3.6V; VI = VCC, GND VCC - 0.1 2.2 2.48 0.1 0.4 1.0 3 36 -25 10 A A mA mA A V Min 2.0 0.8 Max Unit V V V
1. These values of VI are used to test DC electrical characteristics only. Functional test should use VIH 2.4V, VIL 0.5V. 2. Incident wave switching on transmission lines with impedances as low as 75 for commercial temperature range is guaranteed. Maximum test duration is 2ms, one output loaded at a time.
MOTOROLA
4
LVQ DATA BR1478
MC74LVQ646
DYNAMIC SWITCHING CHARACTERISTICS (VCC = 3.3V)
TA = +25C Symbol VOLP VOLV VIHD VILD Characteristic Dynamic LOW Peak Voltage (Note 1) Dynamic LOW Valley Voltage (Note 1) High Level Dynamic Input Voltage (Note 2) Low Level Dynamic Input Voltage (Note 2) Condition CL = 50pF, VIH = 3.3V, VIL = 0V CL = 50pF, VIH = 3.3V, VIL = 0V Input-Under-Test Switching 0V to Threshold, f=1MHz Input-Under-Test Switching 3.3V to Threshold, f=1MHz Min Typ 0.6 -0.5 1.5 1.5 Max 1.0 -1.0 2.0 0.8 Unit V V V V
1. Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH-to-LOW. The remaining output is measured in the LOW state. 2. Number of data inputs is defined as "n" switching, "n-1" inputs switching 0V to 3.3V.
AC CHARACTERISTICS1 (tR = tF = 2.5ns; CL = 50pF; RL = 500)
Limits TA = +25C VCC = 3.0V to 3.6V Symbol fmax tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ tOSHL tOSLH Parameter Clock Pulse Frequency Propagation Delay Clock to Output Propagation Delay Input to Output Propagation Delay Select to Output Output Enable Time OE to An, Bn Output Disable Time OE to An, Bn Output Enable Time DIR to An, Bn Output Disable Time DIR to An, Bn Output-to-Output Skew (Note 2) Min 150 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 12.5 10.0 9.5 8.0 9.5 8.5 8.0 9.0 9.0 8.5 9.0 10.0 9.0 10.0 1.0 1.0 15.0 13.0 12.0 11.0 12.0 11.0 10.5 11.0 11.0 10.5 12.0 12.0 11.0 12.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 14.0 12.0 11.0 9.5 11.0 10.0 9.5 10.0 10.5 9.5 12.0 11.0 10.0 13.0 18.0 15.0 13.5 12.5 13.0 12.5 12.0 12.5 12.5 12.5 14.0 14.0 13.0 15.5 1.0 1.0 Typ Max VCC = 2.7V Min Typ Max TA = -40C to +85C VCC = 3.0V to 3.6V Min 150 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 17.0 14.5 13.5 12.0 13.0 12.5 11.0 12.0 12.0 12.0 13.0 12.5 12.0 14.0 1.5 1.5 20.0 17.0 14.5 14.0 14.5 14.0 13.0 14.0 14.0 14.0 16.0 16.0 15.0 18.0 Max VCC = 2.7V Max Unit MHz ns ns ns ns ns ns ns ns
1. These AC parameters are preliminary and may be modified prior to release. The maximum AC limits are design targets. Actual performance will be specified upon completion of characterization. 2. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH); parameter guaranteed by design.
AC OPERATING REQUIREMENTS (tR = tF = 2.5ns; CL = 50pF; RL = 500)
Limits TA = +25C VCC = 3.0V to 3.6V Symbol ts th tw Parameter Setup TIme, HIGH or LOW Dn to LE Hold TIme, HIGH or LOW Dn to LE LE Pulse Width, HIGH Min 2.5 1.5 3.3 VCC = 2.7V Min 4.0 1.5 5.0 TA = -40C to +85C VCC = 3.0V to 3.6V Min 2.5 1.5 3.3 VCC = 2.7V Min 4.5 1.5 6.0 Unit ns ns ns
LCX DATA BR1478
5
MOTOROLA
MC74LVQ646
CAPACITIVE CHARACTERISTICS
Symbol CPD CIN CI/O Parameter Power Dissipation Capacitance Input Capacitance Input/Output Capacitance Condition 10MHz, VCC = 3.3V, VI = 0V or VCC VCC = Open, VI = 0V or VCC VCC = 3.3V, VI = 0V or VCC Typical 50 4.5 15 Unit pF pF pF
VCC An, Bn, SBA, SAB 50% VCC 0V tPLH, tPHL VOH Bn, An 50% VCC VOL WAVEFORM 1 - SAB to B and SBA to A, An to Bn PROPAGATION DELAYS tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns
OE 50% VCC DIR tPZH An, Bn 50% VCC tPHZ 50% VCC
VCC
0V
VOH - 0.3V 0V tPZL 50% VCC VOL + 0.3V WAVEFORM 2 - OE/DIR to An/Bn OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns tPLZ 3.0V
An, Bn
Figure 1. AC Waveforms
MOTOROLA
6
LVQ DATA BR1478
MC74LVQ646
VCC An, Bn 50% VCC 0V ts CAB, 50% V CC CBA th VCC tw 50% VCC 0V fmax tPLH, tPHL VOH Bn, An 50% VCC VOL WAVEFORM 3 - CLOCK to Bn/An PROPAGATION DELAYS, CLOCK MINIMUM PULSE WIDTH, An/Bn to CLOCK SETUP AND HOLD TIMES tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns except when noted
NEGATIVE PULSE
tw 50% VCC 50% VCC
POSITIVE PULSE
50% VCC tw WAVEFORM 4 - INPUT PULSE DEFINITION tR = tF = 2.5ns, 10% to 90% of 0V to VCC
50% VCC
Figure 2. AC Waveforms
VCC 6V OPEN GND
PULSE GENERATOR RT
DUT CL
R1 RL
TEST tPLH, tPHL tPZL, tPLZ Open Collector/Drain tPLH and tPHL tPZH, tPHZ
SWITCH Open 6V 6V GND
CL = 50pF or equivalent (Includes jig and probe capacitance) RL = R1 = 500 or equivalent RT = ZOUT of pulse generator (typically 50)
Figure 3. Test Circuit
LCX DATA BR1478
7
MOTOROLA
MC74LVQ646
OUTLINE DIMENSIONS
DW SUFFIX PLASTIC SOIC PACKAGE CASE 751E-04 ISSUE E -A -
24 13 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 15.25 15.54 7.40 7.60 2.35 2.65 0.35 0.49 0.41 0.90 1.27 BSC 0.23 0.32 0.13 0.29 0 8 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.601 0.612 0.292 0.299 0.093 0.104 0.014 0.019 0.016 0.035 0.050 BSC 0.009 0.013 0.005 0.011 0 8 0.395 0.415 0.010 0.029
-B -
1 12
P 12 PL 0.010 (0.25)
M
B
M
J D 24 PL 0.010 (0.25)
M
TA
S
B
S
F R X 45 C -T - SEATING PLANE G 22 PL K M
SD SUFFIX PLASTIC SSOP PACKAGE CASE 940D-03 ISSUE B
24X
K REF 0.12 (0.005)
M
TU
S
V
S
L/2 L
PIN 1 IDENT
24
13
J B
1
12
A -V- 0.20 (0.008)
M
-U- N
S
TU
N F DETAIL E
DIM A B C D F G H J J1 K K1 L M
0.076 (0.003) -T-
SEATING PLANE
C D G H
DETAIL E
MOTOROLA
8
CCCC EEEC CCC EEEC CCC EEEC CCC CCCC
K K1 M
J1
SECTION N-N
0.25 (0.010)
NOTES: 4 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 CONTROLLING DIMENSION: MILLIMETER. 6 DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 7 DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 8 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION/INTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF K DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR INTRUSION SHALL NOT REDUCE DIMENSION K BY MORE THAN 0.07 (0.002) AT LEAST MATERIAL CONDITION. 9 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 10 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 8.07 8.33 5.20 5.38 1.73 1.99 0.05 0.21 0.63 0.95 0.65 BSC 0.44 0.60 0.09 0.20 0.09 0.16 0.25 0.38 0.25 0.33 7.65 7.90 0_ 8_ INCHES MIN MAX 0.317 0.328 0.205 0.212 0.068 0.078 0.002 0.008 0.024 0.037 0.026 BSC 0.017 0.024 0.003 0.008 0.003 0.006 0.010 0.015 0.010 0.013 0.301 0.311 0_ 8_
-W-
LVQ DATA BR1478
MC74LVQ646
OUTLINE DIMENSIONS
DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948H-01 ISSUE O
24X K REF
0.10 (0.004) 0.15 (0.006) T U
S
M
TU
S
V
S
2X
L/2
24
13
L
PIN 1 IDENT. 1 12
B -U-
0.15 (0.006) T U
S
A -V-
NOTES: 1 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4 DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 7.70 7.90 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.303 0.311 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
C 0.10 (0.004) -T- SEATING
PLANE
D
G
H
-W-
DETAIL E N
J1
SECTION N-N J
LCX DATA BR1478
CCC EE CCC EE CCC EE CCC EE
K K1
0.25 (0.010) M
N F DETAIL E
9
MOTOROLA
MC74LVQ646
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
How to reach us: USA/EUROPE: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 MFAX: RMFAX0@email.sps.mot.com -TOUCHTONE (602) 244-6609 INTERNET: http://Design-NET.com
JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, Toshikatsu Otsuki, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-3521-8315 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298
MOTOROLA 10
*MC74LVQ646/D*
MC74LVQ646/D LVQ DATA BR1478


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